1. Field of the Invention
The present invention relates to a capacitor and a method of manufacturing the same, and more particularly, to increase of capacitance density of a capacitor, improvement of selectivity of dielectric material and electrode metal in constructing the capacitor, and simplification of a manufacturing process of the capacitor.
2. Background Art
Al electrolytic capacitors and multi-layer ceramic capacitors are known and widely used in the art. An Al electrolytic capacitor uses electrolyte and so has a problem in structure for prevention of liquid leakage. A multi-layer ceramic capacitor requires firing and has a problem in design due to variation of a difference in thermal contraction between an electrode and a dielectric substance. Examples of techniques for implementing small and large-capacity capacitors may include a grain boundary-insulated semiconductor ceramic capacitor, which is disclosed in JP-B No. S61-29133 mentioned below, and a capacitor structure body and a method of forming the same, which are disclosed in JP-A No. 2003-249417 mentioned below.
In JP-B No. S61-29133, there is disclosed a grain boundary-insulated semiconductor ceramic capacitor including a grain boundary-insulated semiconductor ceramic having a plurality of through-holes extending opposing sections, external connection electrodes provided in the opposing sections of the grain boundary-insulated semiconductor ceramic, and electrode bodies for capacity which are made of high melting point metal and are inserted in the through-holes of the grain boundary-insulated semiconductor ceramic. The electrode bodies for capacity are conductively connected to the external connection electrodes which are different from each other.
In JP-A No. 2003-249417, there is disclosed an example of a method of forming a capacitor structure body, in which, using a porous substrate obtained by anodizing a substrate, a thin-film forming process is carried out to form a first electrode having a plurality of pillar-shaped bodies on a surface of a substrate for capacitor, a dielectric thin film formed on the surface of the first electrode in such a manner that the dielectric thin film covers the outer side of the pillar-shaped bodies, and a second electrode formed on the surface of the dielectric thin film in such a manner that the second electrode covers the outer side of the pillar-shaped bodies.    [Patent Document 1] JP-B No. S61-29133    [Patent Document 2] JP-A-2003-249417
However, the above related art have the following problems. First, in the technique disclosed in JP-B No. S61-29133 disclosing the structure in which the grain boundary-insulated semiconductor ceramic with the plurality of through-holes is used as a dielectric layer and the capacitive electrode bodies are selectively inserted in the through-holes, it is difficult to achieve large-capacity with increase of an area due to difficulty of micro-processing. In the technique disclosed in JP-A No. 2003-249417, since electrode material is attached to the porous substrate used as the mask and holes are enlarged when the porous substrate is etched, it is difficult to obtain the pillar-shaped bodies having uniform section and desired length. In addition, when the pillar-shaped bodies become lengthened, there may occur variation in film thickness of the dielectric thin film, which makes it difficult to achieve large-capacity with increased height of the pillar-shaped bodies.